[FM-India] Call for Participation -- 1st Call -- 14th ACM-IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2016)

Sandeep K. Shukla sandeeps at cse.iitk.ac.in
Wed Oct 12 11:55:35 IST 2016



14th ACM/IEEE International Conference on Methods and Models for System


Indian Institute of Technology, Kanpur, India, November 18-20, 2016





MEMOCODE's objective is to emphasize the importance of models and

in correct system design and development, and to bring together researchers

industry practitioners interested in all aspects of computer system

to exchange ideas, research results and lessons learned. This covers all

of methods and models for system, hardware, and software design and

formal foundations, engineering methods, tools, and experimental case

This year, MEMOCODE takes place at IIT Kanpur in India, and offers the

interesting program:





    * Keynote I: How to Prove Hybrid Systems

      Andre' Platzer, Carnegie Mellon University

    * Keynote II: Multiform Logical Time for Me/Mo-codesign

      Robert de Simone, INRIA

    * Keynote III: Trusted Cloud: How to make the cloud more secure

      Sriram Rajamani, Microsoft Research





    * Formal Feature Analysis of Hybrid Automata

      Antonio Bruto Da Costa, Pallab Dasgupta, and Goran Frehse

    * Parallel Reachability Analysis for Hybrid Systems

      Amit Gurung, Arup Kumar Deka, Ezio Bartocci, Sergiy Bogomolov,

      Radu Grosu, and Rajarshi Ray

    * Control-flow Guided Property Directed Reachability for Synchronous


      Xian Li and Klaus Schneider

    * A Computer-Algebraic Approach to Formal Verification of Data-Centric

      Low-Level Software

      Oliver Marx, Carlos Villarraga, Dominik Stoffel and Wolfgang Kunz

    * Verifying the Concentration Property of Permutation Networks by BDDs

      Tripti Jain and Klaus Schneider

    * Combining Type Checking with Model Checking for System Verification

      Zhiqiang Ren and Hongwei Xi

    * Formal Engineering Frameworks in Maritime Domain Awareness

      Amir Yaghoubi Shahir, Uwe Glässer, Hamed Yaghoubi Shahir,

      Mohammad Ali Tayebi, and Hans Wehn

    * Frame Conditions in Symbolic Representations of UML/OCL Models

      Nils Przigoda, Jonas Gomes Filho, Philipp Niemann, Robert Wille,

      Rolf Drechsler

    * Towards Integrating Statistical Model Checking into Property-Based

      Bernhard K. Aichernig and Richard Schumi

    * Clocks vs. Instants Relations: Verifying CCSL Time Constraints in

      UML/MARTE Models

      Judith Peters, Nils Przigoda, Robert Wille, and Rolf Drechsler

    * Specification of Precise Timing in Dataflow Models

      Patricia Derler, Kaushik Ravindran, and Rhishikesh Limaye

    * Specification, Verification, and Synthesis using Extended State

      Machines with Callbacks

      Farhaan Fowze and Tuba Yavuz

    * Performance-aware Scheduling of Multicore Time-critical Systems

      Jalil Boudjadar, Jin Hyun Kim, and Simin Nadjm-Tehrani

    * Accelerating Schedule Space Exploration of Multi-threaded Programs
with GPUs

      Prakhar Banga, Atul Pai, Subhajit Roy, and Mainak Chaudhuri

    * Verification of Component Architectures using Mode-Based Contracts

      Stefan Kugele, Diego Marmsoler, Núria Mata, and Kai Werther

    * Optimal Compilation for Exposed Datapath Architectures with Buffered

      Processing Units by SAT Solvers

      Anoop Bhagyanath and Klaus Schneider

    * A formal approach to the mapping of tasks on an heterogenous

      energy-aware architecture

      Emilien Kofman and Robert de Simone

    * Asynchrony-Aware Static Analysis of Android Applications

      Ashish Mishra, Aditya Kanade and Y. N. Srikant

    * Step Revision in Hybrid Co-simulation with FMI

      Fabio Cremona, Marten Lohstroh, David Broman, Marco Di Natale,

      Edward Lee, and Stavros Tripakis

    * An Efficient Algorithm for Monitoring Practical TPTL Specifications

      Adel Dokhanchi, Bardh Hoxha, Cumhur Erkan Tuncali, and Georgios






Dr. Sandeep K. Shukla

Poonam and Prabhu Goel Chair Professor

Department of Computer Science and Engineering

Indian Institute of Technology, Kanpur

Kanpur, India




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